QSC Post Quantum Cryptographic Library 1.0.0.6b (A6)
A post quantum secure library written in Ansi C
common.h
Go to the documentation of this file.
1/*
2 * 2025 Quantum Resistant Cryptographic Solutions Corporation
3 * All Rights Reserved.
4 *
5 * NOTICE: This software and all accompanying materials are the exclusive
6 * property of Quantum Resistant Cryptographic Solutions Corporation (QRCS).
7 * The intellectual and technical concepts contained within this implementation
8 * are proprietary to QRCS and its authorized licensors and are protected under
9 * applicable U.S. and international copyright, patent, and trade secret laws.
10 *
11 * CRYPTOGRAPHIC STANDARDS:
12 * - This software includes implementations of cryptographic algorithms such as
13 * SHA3, AES, and others. These algorithms are public domain or standardized
14 * by organizations such as NIST and are NOT the property of QRCS.
15 * - However, all source code, optimizations, and implementations in this library
16 * are original works of QRCS and are protected under this license.
17 *
18 * RESTRICTIONS:
19 * - Redistribution, modification, or unauthorized distribution of this software,
20 * in whole or in part, is strictly prohibited.
21 * - This software is provided for non-commercial, educational, and research
22 * purposes only. Commercial use in any form is expressly forbidden.
23 * - Licensing and authorized distribution are solely at the discretion of QRCS.
24 * - Any use of this software implies acceptance of these restrictions.
25 *
26 * DISCLAIMER:
27 * This software is provided "as is," without warranty of any kind, express or
28 * implied, including but not limited to warranties of merchantability or fitness
29 * for a particular purpose. QRCS disclaims all liability for any direct, indirect,
30 * incidental, or consequential damages resulting from the use or misuse of this software.
31 *
32 * FULL LICENSE:
33 * This software is subject to the **Quantum Resistant Cryptographic Solutions
34 * Proprietary License (QRCS-PL)**. The complete license terms are included
35 * in the LICENSE.txt file distributed with this software.
36 *
37 * Written by: John G. Underhill
38 * Contact: john.underhill@protonmail.com
39 */
40
41#ifndef QSC_COMMON_H
42#define QSC_COMMON_H
43
44/* All includes come immediately after the include guard */
45#include <assert.h>
46#include <errno.h>
47#include <stdbool.h>
48#include <stdint.h>
49#include <limits.h>
50#include <string.h>
51
61
62/*==============================================================================
63 Compiler Identification Macros
64==============================================================================*/
65
66#if defined(_MSC_VER)
71# define QSC_SYSTEM_COMPILER_MSC
72#endif
73
74#if defined(__MINGW32__)
79# define QSC_SYSTEM_COMPILER_MINGW
84# define QSC_SYSTEM_COMPILER_GCC
85#endif
86
87#if defined(__CC_ARM)
92# define QSC_SYSTEM_COMPILER_ARM
93#endif
94
95#if defined(__BORLANDC__)
100# define QSC_SYSTEM_COMPILER_BORLAND
101#endif
102
103#if defined(__GNUC__) && !defined(__MINGW32__)
108# define QSC_SYSTEM_COMPILER_GCC
109#endif
110
111#if defined(__clang__)
116# define QSC_SYSTEM_COMPILER_CLANG
117#endif
118
119#if defined(__IBMC__) || defined(__IBMCPP__)
124# define QSC_SYSTEM_COMPILER_IBM
125#endif
126
127#if defined(__INTEL_COMPILER) || defined(__ICL)
132# define QSC_SYSTEM_COMPILER_INTEL
133#endif
134
135#if defined(__MWERKS__)
140# define QSC_SYSTEM_COMPILER_MWERKS
141#endif
142
143#if defined(__OPEN64__)
148# define QSC_SYSTEM_COMPILER_OPEN64
149#endif
150
151#if defined(__SUNPRO_C)
156# define QSC_SYSTEM_COMPILER_SUNPRO
157#endif
158
159#if defined(__TURBOC__)
164# define QSC_SYSTEM_COMPILER_TURBO
165#endif
166
167/*==============================================================================
168 Operating System Identification Macros
169==============================================================================*/
170
171#if defined(_WIN64) || defined(_WIN32) || defined(__WIN64__) || defined(__WIN32__)
176# if !defined(QSC_SYSTEM_OS_WINDOWS)
177# define QSC_SYSTEM_OS_WINDOWS
178# endif
179# if defined(_WIN64)
184# define QSC_SYSTEM_ISWIN64
185# elif defined(_WIN32)
190# define QSC_SYSTEM_ISWIN32
191# endif
192#endif
193
194#if defined(__ANDROID__)
199# define QSC_SYSTEM_OS_ANDROID
200#endif
201
202#if defined(__APPLE__) || defined(__MACH__)
203# include "TargetConditionals.h"
208# define QSC_SYSTEM_OS_APPLE
213# define QSC_SYSTEM_OS_BSD
214# if defined(TARGET_OS_IPHONE) && defined(TARGET_IPHONE_SIMULATOR)
219# define QSC_SYSTEM_ISIPHONESIM
220# elif TARGET_OS_IPHONE
225# define QSC_SYSTEM_ISIPHONE
226# else
231# define QSC_SYSTEM_ISOSX
232# endif
233#endif
234
235#if defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__bsdi__) || defined(__DragonFly__) || defined(QSC_SYSTEM_ISOSX)
240# define QSC_SYSTEM_OS_BSD
241#endif
242
243#if defined(__linux) || defined(__linux__) || defined(__gnu_linux__)
248# define QSC_SYSTEM_OS_LINUX
249 typedef int32_t errno_t;
250#endif
251
252#if defined(__unix) || defined(__unix__)
257# define QSC_SYSTEM_OS_UNIX
258# if defined(__hpux) || defined(hpux)
263# define QSC_SYSTEM_OS_HPUX
264# endif
265# if defined(__sun__) || defined(__sun) || defined(sun)
270# define QSC_SYSTEM_OS_SUNUX
271# endif
272#endif
273
274#if defined(__posix) || defined(__posix__) || defined(__USE_POSIX) || defined(_POSIX_VERSION) || defined(QSC_SYSTEM_OS_APPLE)
279# define QSC_SYSTEM_OS_POSIX
280#endif
281
282#if defined(QSC_SYSTEM_OS_WINDOWS) && defined(QSC_SYSTEM_COMPILER_MSC)
287# define QSC_WINDOWS_VSTUDIO_BUILD
288#endif
289
290#if defined(_OPENMP)
295# define QSC_SYSTEM_OPENMP
296#endif
297
298#if defined(DEBUG) || defined(_DEBUG) || defined(__DEBUG__) || (defined(__GNUC__) && !defined(__OPTIMIZE__))
303# define QSC_DEBUG_MODE
304#endif
305
306/*==============================================================================
307 CPU Architecture Identification Macros
308==============================================================================*/
309#if defined(QSC_SYSTEM_COMPILER_MSC)
310# if defined(_M_X64) || defined(_M_AMD64)
315# define QSC_SYSTEM_ARCH_IX86_64
320# define QSC_SYSTEM_ARCH_IX86
321# if defined(_M_AMD64)
326# define QSC_SYSTEM_ARCH_AMD64
327# endif
328# elif defined(_M_IX86) || defined(_X86_)
333# define QSC_SYSTEM_ARCH_IX86_32
338# define QSC_SYSTEM_ARCH_IX86
339# elif defined(_M_ARM)
344# define QSC_SYSTEM_ARCH_ARM
345# if defined(_M_ARM_ARMV7VE)
350# define QSC_SYSTEM_ARCH_ARMV7VE
351# elif defined(_M_ARM_FP)
356# define QSC_SYSTEM_ARCH_ARMFP
357# elif defined(_M_ARM64)
362# define QSC_SYSTEM_ARCH_ARM64
363# endif
364# elif defined(_M_IA64)
369# define QSC_SYSTEM_ARCH_IA64
370# endif
371#elif defined(QSC_SYSTEM_COMPILER_GCC)
372# if defined(__amd64__) || defined(__amd64) || defined(__x86_64__) || defined(__x86_64)
377# define QSC_SYSTEM_ARCH_IX86_64
382# define QSC_SYSTEM_ARCH_IX86
383# if defined(_M_AMD64)
388# define QSC_SYSTEM_ARCH_AMD64
389# endif
390# elif defined(i386) || defined(__i386) || defined(__i386__)
395# define QSC_SYSTEM_ARCH_IX86_32
400# define QSC_SYSTEM_ARCH_IX86
401# elif defined(__arm__)
406# define QSC_SYSTEM_ARCH_ARM
407# if defined(__aarch64__)
412# define QSC_SYSTEM_ARCH_ARM64
413# endif
414# elif defined(__ia64) || defined(__ia64__) || defined(__itanium__)
419# define QSC_SYSTEM_ARCH_IA64
420# elif defined(__powerpc64__) || defined(__ppc64__) || defined(__PPC64__) || defined(__64BIT__) || defined(_LP64) || defined(__LP64__)
425# define QSC_SYSTEM_ARCH_PPC
426# elif defined(__sparc) || defined(__sparc__)
431# define QSC_SYSTEM_ARCH_SPARC
432# if defined(__sparc64__)
437# define QSC_SYSTEM_ARCH_SPARC64
438# endif
439# endif
440#endif
441
442/*==============================================================================
443 Sockets and Other System Macros
444==============================================================================*/
445
446#if defined(_WIN64) || defined(_WIN32) || defined(__CYGWIN__)
451# define QSC_SYSTEM_SOCKETS_WINDOWS
452#else
457# define QSC_SYSTEM_SOCKETS_BERKELY
458#endif
459
460#if !defined(__clang__) && !defined(__GNUC__)
465# ifdef __attribute__
466# undef __attribute__
467# endif
468# define __attribute__(a)
469#endif
470
471#if defined(_DLL)
476# define QSC_DLL_API
477#endif
478
483#if defined(QSC_DLL_API)
484
485#if defined(QSC_SYSTEM_COMPILER_MSC)
486# if defined(QSC_DLL_IMPORT)
487# define QSC_EXPORT_API __declspec(dllimport)
488# else
489# define QSC_EXPORT_API __declspec(dllexport)
490# endif
491#elif defined(QSC_SYSTEM_COMPILER_GCC)
492# if defined(QSC_DLL_IMPORT)
493# define QSC_EXPORT_API __attribute__((dllimport))
494# else
495# define QSC_EXPORT_API __attribute__((dllexport))
496# endif
497#else
498# if defined(__SUNPRO_C)
499# if !defined(__GNU_C__)
500# define QSC_EXPORT_API __attribute__ (visibility(__global))
501# else
502# define QSC_EXPORT_API __attribute__ __global
503# endif
504# elif defined(_MSG_VER)
505# define QSC_EXPORT_API extern __declspec(dllexport)
506# else
507# define QSC_EXPORT_API __attribute__ ((visibility ("default")))
508# endif
509#endif
510#else
511# define QSC_EXPORT_API
512#endif
513
518#if defined(__GNUC__)
519# define QSC_CACHE_ALIGNED __attribute__((aligned(64)))
520#elif defined(_MSC_VER)
521# define QSC_CACHE_ALIGNED __declspec(align(64))
522#endif
523
524#if defined(QSC_SYSTEM_ARCH_IX86_64) || defined(QSC_SYSTEM_ARCH_ARM64) || defined(QSC_SYSTEM_ARCH_IA64) || defined(QSC_SYSTEM_ARCH_AMD64) || defined(QSC_SYSTEM_ARCH_SPARC64)
529# define QSC_SYSTEM_IS_X64
530#else
535# define QSC_SYSTEM_IS_X86
536#endif
537
538#if defined(QSC_SYSTEM_IS_X64)
543# define QSC_SIZE_MAX UINT64_MAX
544#else
549# define QSC_SIZE_MAX UINT32_MAX
550#endif
551
556#define QSC_SYSTEM_IS_LITTLE_ENDIAN (((union { uint32_t x; uint8_t c; }){1}).c)
557
558#if (!defined(QSC_SYSTEM_IS_LITTLE_ENDIAN))
559# if defined(__sparc) || defined(__sparc__) || defined(__hppa__) || defined(__PPC__) || defined(__mips__) || (defined(__MWERKS__) && !defined(__INTEL__))
564# define QSC_SYSTEM_IS_BIG_ENDIAN
565# else
570# define QSC_SYSTEM_IS_LITTLE_ENDIAN
571# endif
572#endif
573
578#if !defined(QSC_ALIGN)
579# if defined(__GNUC__) || defined(__clang__)
580# define QSC_ALIGN(x) __attribute__((aligned(x)))
581# elif defined(_MSC_VER)
582# define QSC_ALIGN(x) __declspec(align(x))
583# else
584# define QSC_ALIGN(x)
585# endif
586#endif
587
588#if defined(__SIZEOF_INT128__) && defined(QSC_SYSTEM_IS_X64) && !defined(__xlc__) && !defined(uint128_t)
593# define QSC_SYSTEM_NATIVE_UINT128
594# if defined(__GNUC__)
599 typedef uint32_t uint128_t __attribute__((mode(TI)));
600# else
601 typedef __int128 uint128_t;
602# endif
603#endif
604
609#if defined(QSC_SYSTEM_NATIVE_UINT128)
610# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
611 do { \
612 const uint128_t r = (uint128_t)(X) * (Y); \
613 *(High) = (r >> 64) & 0xFFFFFFFFFFFFFFFFULL; \
614 *(Low) = (r) & 0xFFFFFFFFFFFFFFFFULL; \
615 } while(0)
616#elif defined(QSC_SYSTEM_COMPILER_MSC) && defined(QSC_SYSTEM_IS_X64)
617# include <intrin.h>
618# pragma intrinsic(_umul128)
619# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
620 do { \
621 *(Low) = _umul128((X), (Y), (High)); \
622 } while(0)
623#elif defined(QSC_SYSTEM_COMPILER_GCC)
624# if defined(QSC_SYSTEM_ARCH_IX86)
625# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
626 do { \
627 asm("mulq %3" : "=d" (*(High)), "=X" (*(Low)) : "X" (X), "rm" (Y) : "cc"); \
628 } while(0)
629# elif defined(QSC_SYSTEM_ARCH_ALPHA)
630# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
631 do { \
632 asm("umulh %1,%2,%0" : "=r" (*(High)) : "r" (X), "r" (Y)); \
633 *(Low) = (X) * (Y); \
634 } while(0)
635# elif defined(QSC_SYSTEM_ARCH_IA64)
636# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
637 do { \
638 asm("xmpy.hu %0=%1,%2" : "=f" (*(High)) : "f" (X), "f" (Y)); \
639 *(Low) = (X) * (Y); \
640 } while(0)
641# elif defined(QSC_SYSTEM_ARCH_PPC)
642# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
643 do { \
644 asm("mulhdu %0,%1,%2" : "=r" (*(High)) : "r" (X), "r" (Y) : "cc"); \
645 *(Low) = (X) * (Y); \
646 } while(0)
647# endif
648#endif
649
654#define QSC_SYSTEM_MAX_PATH 260ULL
655
660#define QSC_SYSTEM_SECMEMALLOC_DEFAULT 4096ULL
661
666#define QSC_SYSTEM_SECMEMALLOC_MIN 16ULL
667
672#define QSC_SYSTEM_SECMEMALLOC_MAX 128ULL
673
678#define QSC_SYSTEM_SECMEMALLOC_MAXKB 512ULL
679
680#if defined(_WIN32)
685# define QSC_SYSTEM_VIRTUAL_LOCK
686
691# define QSC_RTL_SECURE_MEMORY
692#endif
693
694#if defined(_POSIX_MEMLOCK_RANGE)
699# define QSC_SYSTEM_POSIX_MLOCK
700#endif
701
702#if defined(QSC_SYSTEM_VIRTUAL_LOCK) || defined(QSC_SYSTEM_POSIX_MLOCK)
707# define QSC_SYSTEM_SECURE_ALLOCATOR
708#endif
709
714#if defined(QSC_SYSTEM_COMPILER_MSC)
715# define QSC_SYSTEM_OPTIMIZE_IGNORE __pragma(optimize("", off))
716#elif defined(QSC_SYSTEM_COMPILER_GCC) || defined(QSC_SYSTEM_COMPILER_MINGW)
717# if defined(__clang__)
722# define QSC_SYSTEM_OPTIMIZE_IGNORE __attribute__((optnone))
723# else
728# define QSC_SYSTEM_OPTIMIZE_IGNORE __attribute__((optimize("O0")))
729# endif
730#elif defined(QSC_SYSTEM_COMPILER_CLANG)
735# define QSC_SYSTEM_OPTIMIZE_IGNORE __attribute__((optnone))
736#elif defined(QSC_SYSTEM_COMPILER_INTEL)
741# define QSC_SYSTEM_OPTIMIZE_IGNORE pragma optimize("", off)
742#else
743# define QSC_SYSTEM_OPTIMIZE_IGNORE
744#endif
745
750#if defined(QSC_SYSTEM_COMPILER_MSC)
751# define QSC_SYSTEM_OPTIMIZE_RESUME __pragma(optimize("", on))
752#elif defined(QSC_SYSTEM_COMPILER_GCC) || defined(QSC_SYSTEM_COMPILER_MINGW)
753# if defined(__clang__)
754# define QSC_SYSTEM_OPTIMIZE_RESUME
755# else
756# define QSC_SYSTEM_OPTIMIZE_RESUME _Pragma("GCC diagnostic pop")
757# endif
758#elif defined(QSC_SYSTEM_COMPILER_INTEL)
759# define QSC_SYSTEM_OPTIMIZE_RESUME pragma optimize("", on)
760#else
761# define QSC_SYSTEM_OPTIMIZE_RESUME
762#endif
763
768#if defined(QSC_SYSTEM_COMPILER_MSC)
769# define QSC_SYSTEM_CONDITION_IGNORE(x) __pragma(warning(disable : x))
770#elif defined(QSC_SYSTEM_COMPILER_GCC) || defined(QSC_SYSTEM_COMPILER_MINGW)
771# define QSC_SYSTEM_CONDITION_IGNORE(x) _Pragma("GCC diagnostic push") _Pragma("GCC diagnostic ignored \"-Wunused-parameter\"")
772#elif defined(QSC_SYSTEM_COMPILER_INTEL)
773# define QSC_SYSTEM_CONDITION_IGNORE(x)
774#else
775# define QSC_SYSTEM_CONDITION_IGNORE(x)
776#endif
777
778#if (_MSC_VER >= 1600)
783# define QSC_WMMINTRIN_H 1
784#endif
785
786#if (_MSC_VER >= 1700) && (defined(_M_X64))
791# define QSC_HAVE_AVX2INTRIN_H 1
792#endif
793
794/*==============================================================================
795 AVX512 Capabilities
796==============================================================================*/
797
798/* Enable this define to support AVX512 on a compatible system */
799/*#define CEX_AVX512_SUPPORTED*/
800
801#if defined(__AVX512F__) && (__AVX512F__ == 1)
806# include <immintrin.h>
807# if (!defined(__AVX512__))
808# define __AVX512__
809# endif
810#endif
811
812#if defined(__SSE2__)
817# define QSC_SYSTEM_HAS_SSE2
818#endif
819
820#if defined(__SSE3__)
825# define QSC_SYSTEM_HAS_SSE3
826#endif
827
828#if defined(__SSSE3__)
833# define QSC_SYSTEM_HAS_SSSE3
834#endif
835
836#if defined(__SSE4_1__)
841# define QSC_SYSTEM_HAS_SSE41
842#endif
843
844#if defined(__SSE4_2__)
849# define QSC_SYSTEM_HAS_SSE42
850#endif
851
852#if defined(__ARM_NEON__)
853# define QSC_SYSTEM_HAS_ARM_NEON
854#endif
855
856#if defined(__AVX__)
861# define QSC_SYSTEM_HAS_AVX
862#endif
863
864#if defined(__AVX2__)
869# define QSC_SYSTEM_HAS_AVX2
870#endif
871
872#if defined(__AVX512__)
877# define QSC_SYSTEM_HAS_AVX512
878#endif
879
880#if defined(__XOP__)
885# define QSC_SYSTEM_HAS_XOP
886#endif
887
888#if defined(QSC_SYSTEM_HAS_AVX) || defined(QSC_SYSTEM_HAS_AVX2) || defined(QSC_SYSTEM_HAS_AVX512)
893# define QSC_SYSTEM_AVX_INTRINSICS
894#endif
895
896/*==============================================================================
897 Assembly and SIMD Alignment Macros
898==============================================================================*/
899
900/*#define QSC_ASM_ENABLED*/ /* Global ASM processing flag (user-modifiable) */
901
902#if defined(QSC_SYSTEM_AVX_INTRINSICS) && defined(QSC_SYSTEM_COMPILER_GCC) && defined(QSC_ASM_ENABLED)
903 // #define QSC_GCC_ASM_ENABLED /* Uncomment to enable GCC ASM processing */
904#endif
905
906#if defined(QSC_SYSTEM_HAS_AVX512)
911# define QSC_SIMD_ALIGN QSC_ALIGN(64)
916# define QSC_SIMD_ALIGNMENT 64
917#elif defined(QSC_SYSTEM_HAS_AVX2)
922# define QSC_SIMD_ALIGN QSC_ALIGN(32)
927# define QSC_SIMD_ALIGNMENT 32
928#elif defined(QSC_SYSTEM_HAS_AVX)
933# define QSC_SIMD_ALIGN QSC_ALIGN(16)
938# define QSC_SIMD_ALIGNMENT 16
939#else
944# define QSC_SIMD_ALIGN
949# define QSC_SIMD_ALIGNMENT 8
950#endif
951
952#if defined(QSC_SYSTEM_AVX_INTRINSICS)
957# define QSC_RDRAND_COMPATIBLE
958#endif
959
964#define QSC_STATUS_SUCCESS 0LL
965
970#define QSC_STATUS_FAILURE -1LL
971
972/*==============================================================================
973 User Modifiable Values and Cryptographic Parameter Sets
974==============================================================================*/
975
976#if !defined(QSC_SYSTEM_AESNI_ENABLED)
977# if defined(QSC_SYSTEM_AVX_INTRINSICS)
982# define QSC_SYSTEM_AESNI_ENABLED
983# endif
984#endif
985
987// * \def QSC_KECCAK_UNROLLED_PERMUTATION
988// * \brief Define to use the unrolled form of the Keccak permutation function.
989// */
990//#define QSC_KECCAK_UNROLLED_PERMUTATION
991
992/*** Asymmetric Ciphers ***/
993
994/*** ECDH ***/
995
1000#define QSC_ECDH_S1EC25519
1001
1002/*** Kyber ***/
1003
1005// * \def QSC_KYBER_S1P1632
1006// * \brief Enable the Kyber S1-P1632 parameter set.
1007// */
1008//#define QSC_KYBER_S1P1632
1009
1011// * \def QSC_KYBER_S3P2400
1012// * \brief Enable the Kyber S3-P2400 parameter set.
1013// */
1014//#define QSC_KYBER_S3P2400
1015
1020#define QSC_KYBER_S5P3168
1021
1023// * \def QSC_KYBER_S6P3936
1024// * \brief Enable the Kyber S6-P3936 parameter set (experimental).
1025// */
1026//#define QSC_KYBER_S6P3936
1027
1028/*** McEliece ***/
1029
1031// * \def QSC_MCELIECE_S1N3488T64
1032// * \brief Enable the McEliece S1-N3488T64 parameter set.
1033// */
1034//#define QSC_MCELIECE_S1N3488T64
1035
1037// * \def QSC_MCELIECE_S3N4608T96
1038// * \brief Enable the McEliece S3-N4608T96 parameter set.
1039// */
1040//#define QSC_MCELIECE_S3N4608T96
1041
1046#define QSC_MCELIECE_S5N6688T128
1047
1049// * \def QSC_MCELIECE_S6N6960T119
1050// * \brief Enable the McEliece S6-N6960T119 parameter set.
1051// */
1052//#define QSC_MCELIECE_S6N6960T119
1053
1055// * \def QSC_MCELIECE_S7N8192T128
1056// * \brief Enable the McEliece S7-N8192T128 parameter set.
1057// */
1058//#define QSC_MCELIECE_S7N8192T128
1059
1060/*** NTRU ***/
1061
1063// * \def QSC_NTRU_S1HPS2048509
1064// * \brief Enable the NTRU S1HPS2048509 parameter set.
1065// */
1066//#define QSC_NTRU_S1HPS2048509
1067
1069// * \def QSC_NTRU_S3HPS2048677
1070// * \brief Enable the NTRU S3HPS2048677 parameter set.
1071// */
1072//#define QSC_NTRU_S3HPS2048677
1073
1078#define QSC_NTRU_S5HPS4096821
1079
1081// * \def QSC_NTRU_S5HRSS701
1082// * \brief Enable the NTRU S5HRSS701 parameter set.
1083// */
1084//#define QSC_NTRU_S5HRSS701
1085
1086/*** Signature Schemes ***/
1087
1088/*** Dilithium ***/
1089
1091// * \def QSC_DILITHIUM_S1P2544
1092// * \brief Enable the Dilithium S1P2544 parameter set.
1093// */
1094//#define QSC_DILITHIUM_S1P2544
1095
1097// * \def QSC_DILITHIUM_S3P4016
1098// * \brief Enable the Dilithium S3P4016 parameter set.
1099// */
1100//#define QSC_DILITHIUM_S3P4016
1101
1106#define QSC_DILITHIUM_S5P4880
1107
1108/*** ECDSA ***/
1109
1114#define QSC_ECDSA_S1EC25519
1115
1116/*** Falcon ***/
1117
1119// * \def QSC_FALCON_S3SHAKE256F512
1120// * \brief Enable the Falcon S3SHAKE256F512 parameter set.
1121// */
1122//#define QSC_FALCON_S3SHAKE256F512
1123
1128#define QSC_FALCON_S5SHAKE256F1024
1129
1130/*** SphincsPlus ***/
1131
1133// * \def QSC_SPHINCSPLUS_S1S128SHAKERF
1134// * \brief Enable the SphincsPlus S1S128SHAKERF robust fast parameter set.
1135// */
1136//#define QSC_SPHINCSPLUS_S1S128SHAKERF
1137
1139// * \def QSC_SPHINCSPLUS_S1S128SHAKERS
1140// * \brief Enable the SphincsPlus S1S128SHAKERS robust small parameter set.
1141// */
1142//#define QSC_SPHINCSPLUS_S1S128SHAKERS
1143
1145// * \def QSC_SPHINCSPLUS_S3S192SHAKERF
1146// * \brief Enable the SphincsPlus S3S192SHAKERF robust fast parameter set.
1147// */
1148//#define QSC_SPHINCSPLUS_S3S192SHAKERF
1149
1151// * \def QSC_SPHINCSPLUS_S3S192SHAKERS
1152// * \brief Enable the SphincsPlus S3S192SHAKERS robust small parameter set.
1153// */
1154//#define QSC_SPHINCSPLUS_S3S192SHAKERS
1155
1160#define QSC_SPHINCSPLUS_S5S256SHAKERF
1161
1163// * \def QSC_SPHINCSPLUS_S5S256SHAKERS
1164// * \brief Enable the SphincsPlus S5S256SHAKERS robust small parameter set.
1165// */
1166//#define QSC_SPHINCSPLUS_S5S256SHAKERS
1167
1169// * \def QSC_SPHINCSPLUS_S6S512SHAKERF
1170// * \brief Enable the SphincsPlus S6S512SHAKERF robust fast parameter set.
1171// */
1172//#define QSC_SPHINCSPLUS_S6S512SHAKERF
1173
1175// * \def QSC_SPHINCSPLUS_S6S512SHAKERS
1176// * \brief Enable the SphincsPlus S6S512SHAKERS robust small parameter set.
1177// */
1178//#define QSC_SPHINCSPLUS_S6S512SHAKERS
1179
1180#endif
#define __attribute__(a)
Fallback definition for the attribute keyword for compilers that do not support it.
Definition common.h:468