QSC Post Quantum Cryptographic Library 1.0.0.6c (A6)
A post quantum secure library written in Ansi C
 
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common.h
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1/*
2 * 2025 Quantum Resistant Cryptographic Solutions Corporation
3 * All Rights Reserved.
4 *
5 * NOTICE: This software and all accompanying materials are the exclusive
6 * property of Quantum Resistant Cryptographic Solutions Corporation (QRCS).
7 * The intellectual and technical concepts contained within this implementation
8 * are proprietary to QRCS and its authorized licensors and are protected under
9 * applicable U.S. and international copyright, patent, and trade secret laws.
10 *
11 * CRYPTOGRAPHIC STANDARDS:
12 * - This software includes implementations of cryptographic algorithms such as
13 * SHA3, AES, and others. These algorithms are public domain or standardized
14 * by organizations such as NIST and are NOT the property of QRCS.
15 * - However, all source code, optimizations, and implementations in this library
16 * are original works of QRCS and are protected under this license.
17 *
18 * RESTRICTIONS:
19 * - Redistribution, modification, or unauthorized distribution of this software,
20 * in whole or in part, is strictly prohibited.
21 * - This software is provided for non-commercial, educational, and research
22 * purposes only. Commercial use in any form is expressly forbidden.
23 * - Licensing and authorized distribution are solely at the discretion of QRCS.
24 * - Any use of this software implies acceptance of these restrictions.
25 *
26 * DISCLAIMER:
27 * This software is provided "as is," without warranty of any kind, express or
28 * implied, including but not limited to warranties of merchantability or fitness
29 * for a particular purpose. QRCS disclaims all liability for any direct, indirect,
30 * incidental, or consequential damages resulting from the use or misuse of this software.
31 *
32 * FULL LICENSE:
33 * This software is subject to the **Quantum Resistant Cryptographic Solutions
34 * Proprietary License (QRCS-PL)**. The complete license terms are included
35 * in the LICENSE.txt file distributed with this software.
36 *
37 * Written by: John G. Underhill
38 * Contact: john.underhill@protonmail.com
39 */
40
41#ifndef QSC_COMMON_H
42#define QSC_COMMON_H
43
44#include <assert.h>
45#include <errno.h>
46#include <limits.h>
47#include <stdbool.h>
48#include <stdint.h>
49#include <string.h>
50
51#if defined(__cplusplus)
52# define QSC_CPLUSPLUS_ENABLED_START extern "C" {
53# define QSC_CPLUSPLUS_ENABLED_END }
54#else
55# define QSC_CPLUSPLUS_ENABLED_START
56# define QSC_CPLUSPLUS_ENABLED_END
57#endif
58
59QSC_CPLUSPLUS_ENABLED_START
60
70
71/*==============================================================================
72 Compiler Identification Macros
73==============================================================================*/
74
75#if defined(_MSC_VER)
80# define QSC_SYSTEM_COMPILER_MSC
81#endif
82
83#if defined(__MINGW32__)
88# define QSC_SYSTEM_COMPILER_MINGW
93# define QSC_SYSTEM_COMPILER_GCC
94#endif
95
96#if defined(__CC_ARM)
101# define QSC_SYSTEM_COMPILER_ARM
102#endif
103
104#if defined(__BORLANDC__)
109# define QSC_SYSTEM_COMPILER_BORLAND
110#endif
111
112#if defined(__GNUC__) && !defined(__MINGW32__)
117# define QSC_SYSTEM_COMPILER_GCC
118#endif
119
120#if defined(__clang__)
125# define QSC_SYSTEM_COMPILER_CLANG
126#endif
127
128#if defined(__IBMC__) || defined(__IBMCPP__)
133# define QSC_SYSTEM_COMPILER_IBM
134#endif
135
136#if defined(__INTEL_COMPILER) || defined(__ICL)
141# define QSC_SYSTEM_COMPILER_INTEL
142#endif
143
144#if defined(__MWERKS__)
149# define QSC_SYSTEM_COMPILER_MWERKS
150#endif
151
152#if defined(__OPEN64__)
157# define QSC_SYSTEM_COMPILER_OPEN64
158#endif
159
160#if defined(__SUNPRO_C)
165# define QSC_SYSTEM_COMPILER_SUNPRO
166#endif
167
168#if defined(__TURBOC__)
173# define QSC_SYSTEM_COMPILER_TURBO
174#endif
175
176/*==============================================================================
177 Operating System Identification Macros
178==============================================================================*/
179
180#if defined(_WIN64) || defined(_WIN32) || defined(__WIN64__) || defined(__WIN32__)
185# if !defined(QSC_SYSTEM_OS_WINDOWS)
186# define QSC_SYSTEM_OS_WINDOWS
187# endif
188# if defined(_WIN64)
193# define QSC_SYSTEM_ISWIN64
194# elif defined(_WIN32)
199# define QSC_SYSTEM_ISWIN32
200# endif
201#endif
202
203#if defined(__ANDROID__)
208# define QSC_SYSTEM_OS_ANDROID
209#endif
210
211#if defined(__APPLE__) || defined(__MACH__)
212# include "TargetConditionals.h"
217# define QSC_SYSTEM_OS_APPLE
222# define QSC_SYSTEM_OS_BSD
223# if defined(TARGET_OS_IPHONE) && defined(TARGET_IPHONE_SIMULATOR)
228# define QSC_SYSTEM_ISIPHONESIM
229# elif TARGET_OS_IPHONE
234# define QSC_SYSTEM_ISIPHONE
235# else
240# define QSC_SYSTEM_ISOSX
241# endif
242#endif
243
244#if defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__bsdi__) || defined(__DragonFly__) || defined(QSC_SYSTEM_ISOSX)
249# define QSC_SYSTEM_OS_BSD
250#endif
251
252#if defined(__linux) || defined(__linux__) || defined(__gnu_linux__)
257# define QSC_SYSTEM_OS_LINUX
258 typedef int32_t errno_t;
259#endif
260
261#if defined(__unix) || defined(__unix__)
266# define QSC_SYSTEM_OS_UNIX
267# if defined(__hpux) || defined(hpux)
272# define QSC_SYSTEM_OS_HPUX
273# endif
274# if defined(__sun__) || defined(__sun) || defined(sun)
279# define QSC_SYSTEM_OS_SUNUX
280# endif
281#endif
282
283#if defined(__posix) || defined(__posix__) || defined(__USE_POSIX) || defined(_POSIX_VERSION) || defined(QSC_SYSTEM_OS_APPLE)
288# define QSC_SYSTEM_OS_POSIX
289#endif
290
291#if defined(QSC_SYSTEM_OS_WINDOWS) && defined(QSC_SYSTEM_COMPILER_MSC)
296# define QSC_WINDOWS_VSTUDIO_BUILD
297#endif
298
299#if defined(_OPENMP)
304# define QSC_SYSTEM_OPENMP
305#endif
306
307#if defined(DEBUG) || defined(_DEBUG) || defined(__DEBUG__) || (defined(__GNUC__) && !defined(__OPTIMIZE__))
312# define QSC_DEBUG_MODE
313#endif
314
315/*==============================================================================
316 CPU Architecture Identification Macros
317==============================================================================*/
318#if defined(QSC_SYSTEM_COMPILER_MSC)
319# if defined(_M_X64) || defined(_M_AMD64)
324# define QSC_SYSTEM_ARCH_IX86_64
329# define QSC_SYSTEM_ARCH_IX86
330# if defined(_M_AMD64)
335# define QSC_SYSTEM_ARCH_AMD64
336# endif
337# elif defined(_M_IX86) || defined(_X86_)
342# define QSC_SYSTEM_ARCH_IX86_32
347# define QSC_SYSTEM_ARCH_IX86
348# elif defined(_M_ARM)
353# define QSC_SYSTEM_ARCH_ARM
354# if defined(_M_ARM_ARMV7VE)
359# define QSC_SYSTEM_ARCH_ARMV7VE
360# elif defined(_M_ARM_FP)
365# define QSC_SYSTEM_ARCH_ARMFP
366# elif defined(_M_ARM64)
371# define QSC_SYSTEM_ARCH_ARM64
372# endif
373# elif defined(_M_IA64)
378# define QSC_SYSTEM_ARCH_IA64
379# endif
380#elif defined(QSC_SYSTEM_COMPILER_GCC)
381# if defined(__amd64__) || defined(__amd64) || defined(__x86_64__) || defined(__x86_64)
386# define QSC_SYSTEM_ARCH_IX86_64
391# define QSC_SYSTEM_ARCH_IX86
392# if defined(_M_AMD64)
397# define QSC_SYSTEM_ARCH_AMD64
398# endif
399# elif defined(i386) || defined(__i386) || defined(__i386__)
404# define QSC_SYSTEM_ARCH_IX86_32
409# define QSC_SYSTEM_ARCH_IX86
410# elif defined(__arm__)
415# define QSC_SYSTEM_ARCH_ARM
416# if defined(__aarch64__)
421# define QSC_SYSTEM_ARCH_ARM64
422# endif
423# elif defined(__ia64) || defined(__ia64__) || defined(__itanium__)
428# define QSC_SYSTEM_ARCH_IA64
429# elif defined(__powerpc64__) || defined(__ppc64__) || defined(__PPC64__) || defined(__64BIT__) || defined(_LP64) || defined(__LP64__)
434# define QSC_SYSTEM_ARCH_PPC
435# elif defined(__sparc) || defined(__sparc__)
440# define QSC_SYSTEM_ARCH_SPARC
441# if defined(__sparc64__)
446# define QSC_SYSTEM_ARCH_SPARC64
447# endif
448# endif
449#endif
450
451/*==============================================================================
452 Sockets and Other System Macros
453==============================================================================*/
454
455#if defined(_WIN64) || defined(_WIN32) || defined(__CYGWIN__)
460# define QSC_SYSTEM_SOCKETS_WINDOWS
461#else
466# define QSC_SYSTEM_SOCKETS_BERKELY
467#endif
468
469#if !defined(__clang__) && !defined(__GNUC__)
474# ifdef __attribute__
475# undef __attribute__
476# endif
477# define __attribute__(a)
478#endif
479
480#if defined(_DLL)
485# define QSC_DLL_API
486#endif
487
492#if defined(QSC_DLL_API)
493
494#if defined(QSC_SYSTEM_COMPILER_MSC)
495# if defined(QSC_DLL_IMPORT)
496# define QSC_EXPORT_API __declspec(dllimport)
497# else
498# define QSC_EXPORT_API __declspec(dllexport)
499# endif
500#elif defined(QSC_SYSTEM_COMPILER_GCC)
501# if defined(QSC_DLL_IMPORT)
502# define QSC_EXPORT_API __attribute__((dllimport))
503# else
504# define QSC_EXPORT_API __attribute__((dllexport))
505# endif
506#else
507# if defined(__SUNPRO_C)
508# if !defined(__GNU_C__)
509# define QSC_EXPORT_API __attribute__ (visibility(__global))
510# else
511# define QSC_EXPORT_API __attribute__ __global
512# endif
513# elif defined(_MSG_VER)
514# define QSC_EXPORT_API extern __declspec(dllexport)
515# else
516# define QSC_EXPORT_API __attribute__ ((visibility ("default")))
517# endif
518#endif
519#else
520# define QSC_EXPORT_API
521#endif
522
527#if defined(__GNUC__)
528# define QSC_CACHE_ALIGNED __attribute__((aligned(64)))
529#elif defined(_MSC_VER)
530# define QSC_CACHE_ALIGNED __declspec(align(64))
531#endif
532
533#if defined(QSC_SYSTEM_ARCH_IX86_64) || defined(QSC_SYSTEM_ARCH_ARM64) || defined(QSC_SYSTEM_ARCH_IA64) || defined(QSC_SYSTEM_ARCH_AMD64) || defined(QSC_SYSTEM_ARCH_SPARC64)
538# define QSC_SYSTEM_IS_X64
539#else
544# define QSC_SYSTEM_IS_X86
545#endif
546
547#if defined(QSC_SYSTEM_IS_X64)
552# define QSC_SIZE_MAX UINT64_MAX
553#else
558# define QSC_SIZE_MAX UINT32_MAX
559#endif
560
565#define QSC_SYSTEM_IS_LITTLE_ENDIAN (((union { uint32_t x; uint8_t c; }){1}).c)
566
567#if (!defined(QSC_SYSTEM_IS_LITTLE_ENDIAN))
568# if defined(__sparc) || defined(__sparc__) || defined(__hppa__) || defined(__PPC__) || defined(__mips__) || (defined(__MWERKS__) && !defined(__INTEL__))
573# define QSC_SYSTEM_IS_BIG_ENDIAN
574# else
579# define QSC_SYSTEM_IS_LITTLE_ENDIAN
580# endif
581#endif
582
587#if !defined(QSC_ALIGN)
588# if defined(__GNUC__) || defined(__clang__)
589# define QSC_ALIGN(x) __attribute__((aligned(x)))
590# elif defined(_MSC_VER)
591# define QSC_ALIGN(x) __declspec(align(x))
592# else
593# define QSC_ALIGN(x)
594# endif
595#endif
596
597#if defined(__SIZEOF_INT128__) && defined(QSC_SYSTEM_IS_X64) && !defined(__xlc__) && !defined(uint128_t)
602# define QSC_SYSTEM_NATIVE_UINT128
603# if defined(__GNUC__)
608 typedef uint32_t uint128_t __attribute__((mode(TI)));
609# else
610 typedef __int128 uint128_t;
611# endif
612#endif
613
618#if defined(QSC_SYSTEM_NATIVE_UINT128)
619# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
620 do { \
621 const uint128_t r = (uint128_t)(X) * (Y); \
622 *(High) = (r >> 64) & 0xFFFFFFFFFFFFFFFFULL; \
623 *(Low) = (r) & 0xFFFFFFFFFFFFFFFFULL; \
624 } while(0)
625#elif defined(QSC_SYSTEM_COMPILER_MSC) && defined(QSC_SYSTEM_IS_X64)
626# include <intrin.h>
627# pragma intrinsic(_umul128)
628# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
629 do { \
630 *(Low) = _umul128((X), (Y), (High)); \
631 } while(0)
632#elif defined(QSC_SYSTEM_COMPILER_GCC)
633# if defined(QSC_SYSTEM_ARCH_IX86)
634# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
635 do { \
636 asm("mulq %3" : "=d" (*(High)), "=X" (*(Low)) : "X" (X), "rm" (Y) : "cc"); \
637 } while(0)
638# elif defined(QSC_SYSTEM_ARCH_ALPHA)
639# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
640 do { \
641 asm("umulh %1,%2,%0" : "=r" (*(High)) : "r" (X), "r" (Y)); \
642 *(Low) = (X) * (Y); \
643 } while(0)
644# elif defined(QSC_SYSTEM_ARCH_IA64)
645# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
646 do { \
647 asm("xmpy.hu %0=%1,%2" : "=f" (*(High)) : "f" (X), "f" (Y)); \
648 *(Low) = (X) * (Y); \
649 } while(0)
650# elif defined(QSC_SYSTEM_ARCH_PPC)
651# define QSC_SYSTEM_FAST_64X64_MUL(X,Y,Low,High) \
652 do { \
653 asm("mulhdu %0,%1,%2" : "=r" (*(High)) : "r" (X), "r" (Y) : "cc"); \
654 *(Low) = (X) * (Y); \
655 } while(0)
656# endif
657#endif
658
663#define QSC_SYSTEM_MAX_PATH 260ULL
664
669#define QSC_SYSTEM_SECMEMALLOC_DEFAULT 4096ULL
670
675#define QSC_SYSTEM_SECMEMALLOC_MIN 16ULL
676
681#define QSC_SYSTEM_SECMEMALLOC_MAX 128ULL
682
687#define QSC_SYSTEM_SECMEMALLOC_MAXKB 512ULL
688
689#if defined(_WIN32)
694# define QSC_SYSTEM_VIRTUAL_LOCK
695
700# define QSC_RTL_SECURE_MEMORY
701#endif
702
703#if defined(_POSIX_MEMLOCK_RANGE)
708# define QSC_SYSTEM_POSIX_MLOCK
709#endif
710
711#if defined(QSC_SYSTEM_VIRTUAL_LOCK) || defined(QSC_SYSTEM_POSIX_MLOCK)
716# define QSC_SYSTEM_SECURE_ALLOCATOR
717#endif
718
723#if defined(QSC_SYSTEM_COMPILER_MSC)
724# define QSC_SYSTEM_OPTIMIZE_IGNORE __pragma(optimize("", off))
725#elif defined(QSC_SYSTEM_COMPILER_GCC) || defined(QSC_SYSTEM_COMPILER_MINGW)
726# if defined(__clang__)
731# define QSC_SYSTEM_OPTIMIZE_IGNORE __attribute__((optnone))
732# else
737# define QSC_SYSTEM_OPTIMIZE_IGNORE __attribute__((optimize("O0")))
738# endif
739#elif defined(QSC_SYSTEM_COMPILER_CLANG)
744# define QSC_SYSTEM_OPTIMIZE_IGNORE __attribute__((optnone))
745#elif defined(QSC_SYSTEM_COMPILER_INTEL)
750# define QSC_SYSTEM_OPTIMIZE_IGNORE pragma optimize("", off)
751#else
752# define QSC_SYSTEM_OPTIMIZE_IGNORE
753#endif
754
759#if defined(QSC_SYSTEM_COMPILER_MSC)
760# define QSC_SYSTEM_OPTIMIZE_RESUME __pragma(optimize("", on))
761#elif defined(QSC_SYSTEM_COMPILER_GCC) || defined(QSC_SYSTEM_COMPILER_MINGW)
762# if defined(__clang__)
763# define QSC_SYSTEM_OPTIMIZE_RESUME
764# else
765# define QSC_SYSTEM_OPTIMIZE_RESUME _Pragma("GCC diagnostic pop")
766# endif
767#elif defined(QSC_SYSTEM_COMPILER_INTEL)
768# define QSC_SYSTEM_OPTIMIZE_RESUME pragma optimize("", on)
769#else
770# define QSC_SYSTEM_OPTIMIZE_RESUME
771#endif
772
777#if defined(QSC_SYSTEM_COMPILER_MSC)
778# define QSC_SYSTEM_CONDITION_IGNORE(x) __pragma(warning(disable : x))
779#elif defined(QSC_SYSTEM_COMPILER_GCC) || defined(QSC_SYSTEM_COMPILER_MINGW)
780# define QSC_SYSTEM_CONDITION_IGNORE(x) _Pragma("GCC diagnostic push") _Pragma("GCC diagnostic ignored \"-Wunused-parameter\"")
781#elif defined(QSC_SYSTEM_COMPILER_INTEL)
782# define QSC_SYSTEM_CONDITION_IGNORE(x)
783#else
784# define QSC_SYSTEM_CONDITION_IGNORE(x)
785#endif
786
787#if (_MSC_VER >= 1600)
792# define QSC_WMMINTRIN_H 1
793#endif
794
795#if (_MSC_VER >= 1700) && (defined(_M_X64))
800# define QSC_HAVE_AVX2INTRIN_H 1
801#endif
802
803/*==============================================================================
804 AVX512 Capabilities
805==============================================================================*/
806
807/* Enable this define to support AVX512 on a compatible system */
808/*#define CEX_AVX512_SUPPORTED*/
809
810#if defined(__AVX512F__) && (__AVX512F__ == 1)
815# include <immintrin.h>
816# if (!defined(__AVX512__))
817# define __AVX512__
818# endif
819#endif
820
821#if defined(__SSE2__)
826# define QSC_SYSTEM_HAS_SSE2
827#endif
828
829#if defined(__SSE3__)
834# define QSC_SYSTEM_HAS_SSE3
835#endif
836
837#if defined(__SSSE3__)
842# define QSC_SYSTEM_HAS_SSSE3
843#endif
844
845#if defined(__SSE4_1__)
850# define QSC_SYSTEM_HAS_SSE41
851#endif
852
853#if defined(__SSE4_2__)
858# define QSC_SYSTEM_HAS_SSE42
859#endif
860
861#if defined(__ARM_NEON__)
862# define QSC_SYSTEM_HAS_ARM_NEON
863#endif
864
865#if defined(__AVX__)
870# define QSC_SYSTEM_HAS_AVX
871#endif
872
873#if defined(__AVX2__)
878# define QSC_SYSTEM_HAS_AVX2
879#endif
880
881#if defined(__AVX512__)
886# define QSC_SYSTEM_HAS_AVX512
887#endif
888
889#if defined(__XOP__)
894# define QSC_SYSTEM_HAS_XOP
895#endif
896
897#if defined(QSC_SYSTEM_HAS_AVX) || defined(QSC_SYSTEM_HAS_AVX2) || defined(QSC_SYSTEM_HAS_AVX512)
902# define QSC_SYSTEM_AVX_INTRINSICS
903#endif
904
905/*==============================================================================
906 Assembly and SIMD Alignment Macros
907==============================================================================*/
908
909/*#define QSC_ASM_ENABLED*/ /* Global ASM processing flag (user-modifiable) */
910
911#if defined(QSC_SYSTEM_AVX_INTRINSICS) && defined(QSC_SYSTEM_COMPILER_GCC) && defined(QSC_ASM_ENABLED)
912 // #define QSC_GCC_ASM_ENABLED /* Uncomment to enable GCC ASM processing */
913#endif
914
915#if defined(QSC_SYSTEM_HAS_AVX512)
920# define QSC_SIMD_ALIGN QSC_ALIGN(64)
925# define QSC_SIMD_ALIGNMENT 64
926#elif defined(QSC_SYSTEM_HAS_AVX2)
931# define QSC_SIMD_ALIGN QSC_ALIGN(32)
936# define QSC_SIMD_ALIGNMENT 32
937#elif defined(QSC_SYSTEM_HAS_AVX)
942# define QSC_SIMD_ALIGN QSC_ALIGN(16)
947# define QSC_SIMD_ALIGNMENT 16
948#else
953# define QSC_SIMD_ALIGN
958# define QSC_SIMD_ALIGNMENT 8
959#endif
960
961#if defined(QSC_SYSTEM_AVX_INTRINSICS)
966# define QSC_RDRAND_COMPATIBLE
967#endif
968
973#define QSC_STATUS_SUCCESS 0LL
974
979#define QSC_STATUS_FAILURE -1LL
980
981/*==============================================================================
982 User Modifiable Values and Cryptographic Parameter Sets
983==============================================================================*/
984
985#if !defined(QSC_SYSTEM_AESNI_ENABLED)
986# if defined(QSC_SYSTEM_AVX_INTRINSICS)
991# define QSC_SYSTEM_AESNI_ENABLED
992# endif
993#endif
994
996// * \def QSC_KECCAK_UNROLLED_PERMUTATION
997// * \brief Define to use the unrolled form of the Keccak permutation function.
998// */
999//#define QSC_KECCAK_UNROLLED_PERMUTATION
1000
1001/*** Asymmetric Ciphers ***/
1002
1003/*** ECDH ***/
1004
1009#define QSC_ECDH_S1EC25519
1010
1011/*** Kyber ***/
1012
1023#define QSC_KYBER_FIPS203
1024
1026// * \def QSC_KYBER_S1P1632
1027// * \brief Enable the Kyber S1-P1632 parameter set.
1028// */
1029//#define QSC_KYBER_S1P1632
1030
1032// * \def QSC_KYBER_S3P2400
1033// * \brief Enable the Kyber S3-P2400 parameter set.
1034// */
1035//#define QSC_KYBER_S3P2400
1036
1041#define QSC_KYBER_S5P3168
1042
1044// * \def QSC_KYBER_S6P3936
1045// * \brief Enable the Kyber S6-P3936 parameter set (experimental).
1046// */
1047//#define QSC_KYBER_S6P3936
1048
1049/*** McEliece ***/
1050
1052// * \def QSC_MCELIECE_S1N3488T64
1053// * \brief Enable the McEliece S1-N3488T64 parameter set.
1054// */
1055//#define QSC_MCELIECE_S1N3488T64
1056
1058// * \def QSC_MCELIECE_S3N4608T96
1059// * \brief Enable the McEliece S3-N4608T96 parameter set.
1060// */
1061//#define QSC_MCELIECE_S3N4608T96
1062
1067#define QSC_MCELIECE_S5N6688T128
1068
1070// * \def QSC_MCELIECE_S6N6960T119
1071// * \brief Enable the McEliece S6-N6960T119 parameter set.
1072// */
1073//#define QSC_MCELIECE_S6N6960T119
1074
1076// * \def QSC_MCELIECE_S7N8192T128
1077// * \brief Enable the McEliece S7-N8192T128 parameter set.
1078// */
1079//#define QSC_MCELIECE_S7N8192T128
1080
1081/*** NTRU ***/
1082
1084// * \def QSC_NTRU_S1HPS2048509
1085// * \brief Enable the NTRU S1HPS2048509 parameter set.
1086// */
1087//#define QSC_NTRU_S1HPS2048509
1088
1090// * \def QSC_NTRU_S3HPS2048677
1091// * \brief Enable the NTRU S3HPS2048677 parameter set.
1092// */
1093//#define QSC_NTRU_S3HPS2048677
1094
1099#define QSC_NTRU_S5HPS4096821
1100
1102// * \def QSC_NTRU_S5HRSS701
1103// * \brief Enable the NTRU S5HRSS701 parameter set.
1104// */
1105//#define QSC_NTRU_S5HRSS701
1106
1107/*** Signature Schemes ***/
1108
1110// * \def QSC_DILITHIUM_S1P2544
1111// * \brief Enable the Dilithium S1P2544 parameter set.
1112// */
1113//#define QSC_DILITHIUM_S1P2544
1114
1116// * \def QSC_DILITHIUM_S3P4016
1117// * \brief Enable the Dilithium S3P4016 parameter set.
1118// */
1119//#define QSC_DILITHIUM_S3P4016
1120
1125#define QSC_DILITHIUM_S5P4880
1126
1127/*** ECDSA ***/
1128
1133#define QSC_ECDSA_S1EC25519
1134
1135/*** Falcon ***/
1136
1138// * \def QSC_FALCON_S3SHAKE256F512
1139// * \brief Enable the Falcon S3SHAKE256F512 parameter set.
1140// */
1141//#define QSC_FALCON_S3SHAKE256F512
1142
1147#define QSC_FALCON_S5SHAKE256F1024
1148
1149/*** SphincsPlus ***/
1150
1152// * \def QSC_SPHINCSPLUS_S1S128SHAKERF
1153// * \brief Enable the SphincsPlus S1S128SHAKERF robust fast parameter set.
1154// */
1155//#define QSC_SPHINCSPLUS_S1S128SHAKERF
1156
1158// * \def QSC_SPHINCSPLUS_S1S128SHAKERS
1159// * \brief Enable the SphincsPlus S1S128SHAKERS robust small parameter set.
1160// */
1161//#define QSC_SPHINCSPLUS_S1S128SHAKERS
1162
1164// * \def QSC_SPHINCSPLUS_S3S192SHAKERF
1165// * \brief Enable the SphincsPlus S3S192SHAKERF robust fast parameter set.
1166// */
1167//#define QSC_SPHINCSPLUS_S3S192SHAKERF
1168
1170// * \def QSC_SPHINCSPLUS_S3S192SHAKERS
1171// * \brief Enable the SphincsPlus S3S192SHAKERS robust small parameter set.
1172// */
1173//#define QSC_SPHINCSPLUS_S3S192SHAKERS
1174
1179#define QSC_SPHINCSPLUS_S5S256SHAKERF
1180
1182// * \def QSC_SPHINCSPLUS_S5S256SHAKERS
1183// * \brief Enable the SphincsPlus S5S256SHAKERS robust small parameter set.
1184// */
1185//#define QSC_SPHINCSPLUS_S5S256SHAKERS
1186
1188// * \def QSC_SPHINCSPLUS_S6S512SHAKERF
1189// * \brief Enable the SphincsPlus S6S512SHAKERF robust fast parameter set.
1190// */
1191//#define QSC_SPHINCSPLUS_S6S512SHAKERF
1192
1194// * \def QSC_SPHINCSPLUS_S6S512SHAKERS
1195// * \brief Enable the SphincsPlus S6S512SHAKERS robust small parameter set.
1196// */
1197//#define QSC_SPHINCSPLUS_S6S512SHAKERS
1198
1199QSC_CPLUSPLUS_ENABLED_END
1200
1201#endif
__attribute__
#define __attribute__(a)
Fallback definition for the attribute keyword for compilers that do not support it.
Definition common.h:477