cpuidex.h

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/*
 * 2025 Quantum Resistant Cryptographic Solutions Corporation
 * All Rights Reserved.
 *
 * NOTICE: This software and all accompanying materials are the exclusive 
 * property of Quantum Resistant Cryptographic Solutions Corporation (QRCS).
 * The intellectual and technical concepts contained within this implementation 
 * are proprietary to QRCS and its authorized licensors and are protected under 
 * applicable U.S. and international copyright, patent, and trade secret laws.
 *
 * CRYPTOGRAPHIC STANDARDS:
 * - This software includes implementations of cryptographic algorithms such as 
 *   SHA3, AES, and others. These algorithms are public domain or standardized 
 *   by organizations such as NIST and are NOT the property of QRCS.
 * - However, all source code, optimizations, and implementations in this library 
 *   are original works of QRCS and are protected under this license.
 *
 * RESTRICTIONS:
 * - Redistribution, modification, or unauthorized distribution of this software, 
 *   in whole or in part, is strictly prohibited.
 * - This software is provided for non-commercial, educational, and research 
 *   purposes only. Commercial use in any form is expressly forbidden.
 * - Licensing and authorized distribution are solely at the discretion of QRCS.
 * - Any use of this software implies acceptance of these restrictions.
 *
 * DISCLAIMER:
 * This software is provided "as is," without warranty of any kind, express or 
 * implied, including but not limited to warranties of merchantability or fitness 
 * for a particular purpose. QRCS disclaims all liability for any direct, indirect, 
 * incidental, or consequential damages resulting from the use or misuse of this software.
 *
 * FULL LICENSE:
 * This software is subject to the **Quantum Resistant Cryptographic Solutions 
 * Proprietary License (QRCS-PL)**. The complete license terms are included 
 * in the LICENSE.txt file distributed with this software.
 *
 * Written by: John G. Underhill
 * Contact: john.underhill@protonmail.com
 */
 
#ifndef QSC_CPUIDEX_H
#define QSC_CPUIDEX_H
 
#include "common.h"
 
QSC_CPLUSPLUS_ENABLED_START


#define QSC_CPUIDEX_SERIAL_SIZE 12ULL
 
#if defined(QSC_SYSTEM_OS_APPLE) && defined(QSC_SYSTEM_COMPILER_GCC)
    #define QSC_CPUIDEX_VENDOR_SIZE 32
#else
    #define QSC_CPUIDEX_VENDOR_SIZE 12ULL
#endif

typedef enum
{
    qsc_cpuid_unknown = 0x00U,  
    qsc_cpuid_amd     = 0x01U,  
    qsc_cpuid_intel   = 0x02U,  
    qsc_cpuid_via     = 0x03U,  
    qsc_cpuid_hygion  = 0x04U   
} qsc_cpuidex_cpu_type;

QSC_EXPORT_API typedef struct
{
    bool adx;               
    bool aesni;             
    bool pcmul;             
    bool armv7;             
    bool neon;              
    bool sha256;            
    bool sha512;            
    bool sha3;              
    bool avx;               
    bool avx2;              
    bool avx512f;           
    bool hyperthread;       
    bool rdrand;            
    bool rdtcsp;            
    uint32_t cacheline;     
    uint32_t cores;         
    uint32_t cpus;          
    uint32_t freqbase;      
    uint32_t freqmax;       
    uint32_t freqref;       
    uint32_t l1cache;       
    uint32_t l1cacheline;   
    uint32_t l2associative; 
    uint32_t l2cache;       
    char serial[QSC_CPUIDEX_SERIAL_SIZE];  
    char vendor[QSC_CPUIDEX_VENDOR_SIZE];  
    qsc_cpuidex_cpu_type cputype;          
} qsc_cpuidex_cpu_features;

QSC_EXPORT_API bool qsc_cpuidex_features_set(qsc_cpuidex_cpu_features* const features);

QSC_EXPORT_API void qsc_cpuidex_print_stats(void);
 
QSC_CPLUSPLUS_ENABLED_END
 
#endif