cpuidex.h

/* 2020-2026 Quantum Resistant Cryptographic Solutions Corporation
 * All Rights Reserved.
 *
 * NOTICE:
 * This software and all accompanying materials are the exclusive property of
 * Quantum Resistant Cryptographic Solutions Corporation (QRCS). The intellectual
 * and technical concepts contained herein are proprietary to QRCS and are
 * protected under applicable Canadian, U.S., and international copyright,
 * patent, and trade secret laws.
 *
 * CRYPTOGRAPHIC ALGORITHMS AND IMPLEMENTATIONS:
 * - This software includes implementations of cryptographic primitives and
 *   algorithms that are standardized or in the public domain, such as AES
 *   and SHA-3, which are not proprietary to QRCS.
 * - This software also includes cryptographic primitives, constructions, and
 *   algorithms designed by QRCS, including but not limited to RCS, SCB, CSX, QMAC, and
 *   related components, which are proprietary to QRCS.
 * - All source code, implementations, protocol compositions, optimizations,
 *   parameter selections, and engineering work contained in this software are
 *   original works of QRCS and are protected under this license.
 *
 * LICENSE AND USE RESTRICTIONS:
 * - This software is licensed under the Quantum Resistant Cryptographic Solutions
 *   Public Research and Evaluation License (QRCS-PREL), 2025-2026.
 * - Permission is granted solely for non-commercial evaluation, academic research,
 *   cryptographic analysis, interoperability testing, and feasibility assessment.
 * - Commercial use, production deployment, commercial redistribution, or
 *   integration into products or services is strictly prohibited without a
 *   separate written license agreement executed with QRCS.
 * - Licensing and authorized distribution are solely at the discretion of QRCS.
 *
 * EXPERIMENTAL CRYPTOGRAPHY NOTICE:
 * Portions of this software may include experimental, novel, or evolving
 * cryptographic designs. Use of this software is entirely at the user's risk.
 *
 * DISCLAIMER:
 * THIS SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS
 * FOR A PARTICULAR PURPOSE, SECURITY, OR NON-INFRINGEMENT. QRCS DISCLAIMS ALL
 * LIABILITY FOR ANY DIRECT, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
 * ARISING FROM THE USE OR MISUSE OF THIS SOFTWARE.
 *
 * FULL LICENSE:
 * This software is subject to the Quantum Resistant Cryptographic Solutions
 * Public Research and Evaluation License (QRCS-PREL), 2025-2026. The complete license terms
 * are provided in the accompanying LICENSE file or at https://www.qrcscorp.ca.
 *
 * Written by: John G. Underhill
 * Contact: contact@qrcscorp.ca
 */
 
#ifndef QSC_CPUIDEX_H
#define QSC_CPUIDEX_H
 
#include "qsccommon.h"
 
QSC_CPLUSPLUS_ENABLED_START
 
#if defined (QSC_HAS_CPUID)


#define QSC_CPUIDEX_SERIAL_SIZE 12ULL
 
#if defined(QSC_SYSTEM_OS_MAC) && defined(QSC_SYSTEM_COMPILER_GCC)
    #define QSC_CPUIDEX_VENDOR_SIZE 32
#else
    #define QSC_CPUIDEX_VENDOR_SIZE 12ULL
#endif

typedef enum
{
    qsc_cpuid_unknown = 0x00U,  
    qsc_cpuid_amd     = 0x01U,  
    qsc_cpuid_intel   = 0x02U,  
    qsc_cpuid_via     = 0x03U,  
    qsc_cpuid_hygion  = 0x04U   
} qsc_cpuidex_cpu_type;

QSC_EXPORT_API typedef struct
{
    bool adx;               
    bool aesni;             
    bool pcmul;             
    bool armv7;             
    bool neon;              
    bool sha256;            
    bool sha512;            
    bool sha3;              
    bool avx;               
    bool avx2;              
    bool avx512f;           
    bool hyperthread;       
    bool rdrand;            
    bool rdtcsp;            
    uint32_t cacheline;     
    uint32_t cores;         
    uint32_t cpus;          
    uint32_t freqbase;      
    uint32_t freqmax;       
    uint32_t freqref;       
    uint32_t l1cache;       
    uint32_t l1cacheline;   
    uint32_t l2associative; 
    uint32_t l2cache;       
    char serial[QSC_CPUIDEX_SERIAL_SIZE];  
    char vendor[QSC_CPUIDEX_VENDOR_SIZE];  
    qsc_cpuidex_cpu_type cputype;          
} qsc_cpuidex_cpu_features;

QSC_EXPORT_API bool qsc_cpuidex_features_set(qsc_cpuidex_cpu_features* const features);

QSC_EXPORT_API void qsc_cpuidex_print_stats(void);
 
#else
 
/* avoid warning C4206 : translation unit is empty */
typedef int dummy_cpuidex_translation_unit;
 
#endif
 
QSC_CPLUSPLUS_ENABLED_END
 
#endif