Contains the CPU feature availability. More...
#include <cpuidex.h>
Data Fields | |
bool | adx |
bool | aesni |
bool | pcmul |
bool | armv7 |
bool | neon |
bool | sha256 |
bool | sha512 |
bool | sha3 |
bool | avx |
bool | avx2 |
bool | avx512f |
bool | hyperthread |
bool | rdrand |
bool | rdtcsp |
uint32_t | cacheline |
uint32_t | cores |
uint32_t | cpus |
uint32_t | freqbase |
uint32_t | freqmax |
uint32_t | freqref |
uint32_t | l1cache |
uint32_t | l1cacheline |
uint32_t | l2associative |
uint32_t | l2cache |
char | serial [QSC_CPUIDEX_SERIAL_SIZE] |
char | vendor [QSC_CPUIDEX_VENDOR_SIZE] |
qsc_cpuidex_cpu_type | cputype |
Contains the CPU feature availability.
This structure holds flags and parameters indicating the availability of various CPU features such as AES-NI, AVX, NEON, and others. It also stores details about cache sizes, frequency, and manufacturer-specific information.
bool adx |
[bool] True if ADX instructions are available.
bool aesni |
[bool] True if AES-NI instructions are available.
bool armv7 |
[bool] True if ARMv7 features are detected.
bool avx |
[bool] True if AVX instructions are available.
bool avx2 |
[bool] True if AVX2 instructions are available.
bool avx512f |
[bool] True if AVX512 Foundation instructions are available.
uint32_t cacheline |
[uint32_t] The CPU cache line size (in bytes).
uint32_t cores |
[uint32_t] The number of physical cores.
uint32_t cpus |
[uint32_t] The number of logical processors (CPUs).
qsc_cpuidex_cpu_type cputype |
[qsc_cpuidex_cpu_type] CPU manufacturer type.
uint32_t freqbase |
[uint32_t] The base CPU frequency (in Hz).
uint32_t freqmax |
[uint32_t] The maximum CPU frequency (in Hz).
uint32_t freqref |
[uint32_t] The reference CPU frequency (in Hz).
bool hyperthread |
[bool] True if hyper-threading is enabled.
uint32_t l1cache |
[uint32_t] The size of the L1 cache (in bytes).
uint32_t l1cacheline |
[uint32_t] The L1 cache line size (in bytes).
uint32_t l2associative |
[uint32_t] The associativity of the L2 cache.
uint32_t l2cache |
[uint32_t] The size of the L2 cache (in bytes).
bool neon |
[bool] True if NEON SIMD instructions are available.
bool pcmul |
[bool] True if PCLMULQDQ (carry-less multiplication) is available.
bool rdrand |
[bool] True if the RDRAND instruction is supported.
bool rdtcsp |
[bool] True if the RDTCSP instruction is supported.
char serial[QSC_CPUIDEX_SERIAL_SIZE] |
[char[]] CPU serial number.
bool sha256 |
[bool] True if SHA-256 instructions are available.
bool sha3 |
[bool] True if SHA3 instructions are available.
bool sha512 |
[bool] True if SHA-512 instructions are available.
char vendor[QSC_CPUIDEX_VENDOR_SIZE] |
[char[]] CPU vendor name.